The present invention relates to a method of forming a storage capacitor, and more particularly to a method of forming a storage capacitor used in a semiconductor memory device such as a dynamic random access memory.
In the semiconductor memory device such as the dynamic random access memory, staked capacitors are used to ensure a large capacity with realizing a high density integration of the semiconductor memory device. The following descriptions will focus on a conventional storage capacitor and a conventional method of forming the same.
FIG. 1 is a fragmentary cross sectional elevation view illustrative of a conventional storage capacitor provided in a semiconductor memory device. The semiconductor memory device is formed on a semiconductor substrate 101 such as a silicon substrate. Field oxide films 103 are selectively formed on a surface of the semiconductor substrate 101, so that the field oxide films 103 define active regions or device regions. Gate insulation films not illustrated are provided on the active regions or the device regions of the semiconductor substrate 101. Gate electrodes 102 are formed on the gate insulation films. A first inter-layer insulator 104 is provided which extends over the field oxide films 103 and the active regions or the device regions of the semiconductor substrate 101. A second inter-layer insulator 105 is formed on the first inter-layer insulator 104. A first level interconnection layer 106 extends through the second inter-layer insulator 105. A silicon nitride layer 107 is provided on the second inter-layer insulator 105. Contact holes are provided which penetrate the silicon nitride layer 107, the second inter-layer insulator 105 and the first inter-layer insulator 104 to reach the surface of the semiconductor substrate 101. First conductive films 111 are provided within the contact holes 110, wherein the bottoms of the first conductive films 111 are in contact with the surface of the semiconductor substrate 101. Second conductive films 115 are formed on the silicon nitride layer 107, so that the second conductive films 115 are in contact with the tops of the first conductive films 111 within the contact holes 110. A pair of the first conductive film 111 and the second conductive film 115 forms a bottom electrode 117. A capacitive insulation film 118 is provided which extends on the second conductive film 115. A top electrode 119 is provided which extends on the capacitive insulation film 118. The bottom electrode 117, the capacitive insulation film 118 and the top electrode 119 form a storage capacitor.
FIGS. 2A through 2L are fragmentary cross sectional elevation views illustrative of semiconductor memory devices having storage capacitors in sequential steps involved in a conventional method of forming the semiconductor memory device.
With reference to FIG. 2A, field oxide films 103 are selectively formed on a surface of a semiconductor substrate 101, so that the field oxide films 103 define active regions or device regions. Gate insulation films not illustrated are formed on the active regions or the device regions of the semiconductor substrate 101. Gate electrodes 102 are formed on the gate insulation films. A first inter-layer insulator 104 is formed which extends over the field oxide films 103 and the active regions or the device regions of the semiconductor substrate 101. A second inter-layer insulator 105 is formed on the first inter-layer insulator 104. A first level interconnection layer 106 is formed which extends through the second inter-layer insulator 105. A silicon nitride layer 107 is formed on the second inter-layer insulator 105.
A photo-resist film is entirely applied on the silicon nitride layer 107. The photo-resist film is patterned by a photo-lithography technique to form a first photo-resist pattern 108 on the silicon nitride layer 107, wherein the first photo-resist pattern 108 has openings 109 at predetermined positions. The first and second inter-layer insulators 104 and 105 may be made of phospho silicate glass or boron phospho silicate glass. The first level interconnection layer 106 may be made of tungsten silicide.
With reference to FIG. 2B, the first resist-pattern 108 is used to carry out a first anisotropic etching process such as a dry etching process to form contact holes 110 which penetrate the silicon nitride layer 107, the second inter-layer insulator 105 and the first inter-layer insulator 104 to reach the surface of the semiconductor substrate 101.
With reference to FIG. 2C, the used first resist-pattern 108 is removed.
With reference to FIG. 2D, first conductive films 111 are formed within the contact holes 110, wherein the bottoms of the first conductive films 111 are in contact with the surface of the semiconductor substrate 101. The first conductive films 111 are made of polysilicon.
With reference to FIG. 2E, a first insulation film 113 is formed on the silicon nitride layer 107 and on the tops of the first conductive films 111 within the contact holes 110. A photo-resist film is entirely applied on the first insulation film 113. The photo-resist film is patterned by a photo-lithography technique to form a second photo-resist pattern 112 on the first insulation film 113.
With reference to FIG. 2F, the second photo-resist pattern 112 is used to car out a second anisotropic etching process such as a dry etching process to selectively remove the first insulation film 113 to form mask patterns 114 on the silicon nitride layer 107.
With reference to FIG. 2G, a second conductive film 115 is formed on the silicon nitride layer 107 and on the mask patterns 114 as well as on the tops of the first conductive films 111 within the contact holes 110, so that the second conductive film 115 is in contact with the tops of the first conductive films 111 within the contact holes 110.
With reference to FIG. 2H, a second insulation film 116 is formed on the second conductive film 115.
With reference to FIG. 2I, the second insulation film 116 is subjected to an etch back until the second conductive film 115 over the mask patterns 114 are etched and the tops of the mask patterns 114 are made shown.
With reference to FIG. 2J, the mask patterns 114 and the second insulation films 116 are removed by etching process with use of the silicon nitride layer 107 as an etching stopper. As a result, a plurality of bottom electrodes 117 are formed, each of which comprises a pair of the second conductive film 115 and the first conductive films 111.
With reference to FIG. 2K, a capacitive insulation film 118 is formed which extends on the second conductive film 115 and on the silicon nitride layer 107.
With reference to FIG. 2L, a top electrode 119 is formed which extends on the capacitive insulation film 118. As a result, a plurality of storage capacitors are formed, each of which comprises the bottom electrode 117, the capacitive insulation film 118 and the top electrode 119.
The above conventional storage capacitor and the conventional method of forming the same have the following disadvantages.
The bottom electrode 117 comprises two parts, for examples, the first and second conductive films 111 and 115. There are necessary two processes for forming the first and second conductive films 111 and 115 respectively in order to form the bottom electrode 117 of the storage capacitor.
Further, a boundary between the first and second conductive films 111 and 115 is likely to be broken in cleaning process and pre-treatment process. Particularly, in the staked capacitor, a connecting area between the first and second conductive films 111 and 115 is very small and the connecting portion between the first and second conductive films 111 and 115 is likely to be broken. It was required how to prevent or avoid the connecting portion from being broken.
In the above circumstances, it had been required to develop a novel storage capacitor and a novel method of forming the same free from the above problem.